xen/intr: arm64: implement Xen event balancing
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Authored by ehem_freebsd_m5p.com on Aug 26 2021, 4:29 AM.

Details

Reviewers

royger
mhorne
julien_xen.org
manu

Summary

This distributes the event channels among processors instead of placing
all of them on vCPU#0. Normal interrupt sources are balanced once, at
the end of the boot process. Since new event channels can be created
any time, they need to be dynamically balanced.

Diff Detail

Repository

rS FreeBSD src repository - subversion

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Lint Passed

Unit

No Test Coverage

Build Status

Buildable 42835
Build 39723: arc lint + arc unit

Event Timeline

ehem_freebsd_m5p.com created this revision.Aug 26 2021, 4:29 AM

Herald added a reviewer: manu. · View Herald TranscriptAug 26 2021, 4:29 AM

Herald added subscribers: emaste, andrew, imp. · View Herald Transcript

ehem_freebsd_m5p.com requested review of this revision.Aug 26 2021, 4:29 AM

Harbormaster completed remote builds in B41224: Diff 94220.Aug 26 2021, 4:29 AM

ehem_freebsd_m5p.com added a parent revision: D31063: xen/intr: move isrc allocation to architecture (aarch64 version).Aug 27 2021, 10:26 PM

This is a child of D31063, but not a parent of D30950. The reason being D31063 introduces the function modified in D31690. While Xen/ARM64 VMs may have low performance without D31690, they will function, thus it is reasonable to enable Xen/ARM64 without this commit.