arm64: Support non-4 bit ID reg fields
In preparation for using the ID register decode with the cache type
register support a non-4 bit field width.
Reviewed by: imp
Sponsored by: Arm Ltd
Differential Revision: https://reviews.freebsd.org/D47119
Description
Description
Details
Details
- Provenance
andrew Authored on Oct 18 2024, 9:16 AM - Reviewer
- imp
- Differential Revision
- D47119: arm64: Support non-4 bit ID reg fields
- Parents
- rG590c32321df3: arm64: Add ID register field width values
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- Unknown
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