Fix up the clock selection logic so we are more likely to find a best
parent and update the clock register when we have a new clock.
- imx_clk_composite_find_best returns 0 on sucess, uninvert the test so we don't skip a successful look up.
- When we do find a new best parent write out the best divisors rather than the last tested ones.
- Finally, update the clock register to make the change.
If we don't find a new best_parent this still skips doing anything, @mmel I'm
not sure if returnin an error is best here or trying to do a nop update of the
clock and returning the freq in fout.