iommu_gas: pass size without page alignment

[dougm]

Summary

Pass sizes without rounding up to a page multiple and let the iommu code handle that rounding when necessary.

Test Plan

Peter, can you test this on x86 with iommu enabled?

[dougm]

Update comments only.

[dougm]

Merge 'insert' into 'one'. Don't let a->size change on failed lookup. Don't miss the chance to accept a shortened lookup when the second 'start' value exceeds end.

[dougm]

Toss all my parts out.

[dougm]

Typo. Compiles and boots.

[kib]

Please ask Peter to check this.

[alc]

In D35424#803735, @kib wrote:

Please ask Peter to check this.

We also need to modify gicv3_iommu_init() before this change can be committed. It's passing a value greater than the page size as an offset.

[alc]

Andrew, can you please explain the arguments being passed to iommu_map_msi() in gicv3_iommu_init()? The "offset" argument should really be a value that is less than the page size. Right now, it is 0x10040.

As context, this patch fixes the search for unused space in the IOMMU address space. For example, right now, for the iommu_map_msi() call mentioned above the code would search for 0x10040 + page size + 2 * guard page size unused space, even though it only maps one page.

[dougm]

Update for merge lowermatch patch.

[andrew]

It is the register PCI devices will write to when signalling a MSI/MSI-X interrupt. We'll need to be able to map the page the register is on for MSI interrupts to work.

Also not that while IOMMU_PAGE_SIZE is currently a constant it shouldn't be, e.g. on arm64 the Arm SMMU uses a 4k page size, while the Apple IOMMU has a 16k page size.

[andrew]

I think the ITS driver just needs a mask in the iommu_map_msi call. It looks like it correctly sets the physical address on the vm_page it creates, but then assumes iommu_map_msi will mask off the upper bits.

[dougm]

In D35424#803805, @andrew wrote:

I think the ITS driver just needs a mask in the iommu_map_msi call. It looks like it correctly sets the physical address on the vm_page it creates, but then assumes iommu_map_msi will mask off the upper bits.

Does the IO virtual address have to be the same as the physical address?

[andrew]

In D35424#803818, @dougm wrote:

Does the IO virtual address have to be the same as the physical address?

No. @br reported using GITS_TRANSLATER & PAGE_MASK as the offset works.

[andrew]

Do we need the offset? We just need a mapping for the physical page the vm_page_t points to.

[alc]

In D35424#803847, @andrew wrote:

Do we need the offset? We just need a mapping for the physical page the vm_page_t points to.

From what you've written, I would say, "No." We can simply pass 0 as the offset. Can you verify that the current patch works?

[br]

In D35424#803934, @alc wrote:

In D35424#803847, @andrew wrote:

Do we need the offset? We just need a mapping for the physical page the vm_page_t points to.

From what you've written, I would say, "No." We can simply pass 0 as the offset. Can you verify that the current patch works?

the patch works for me on ARM Morello with IOMMU enabled

[pho]

No problems seen with a short test on amd64.