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Differential D47077

uart/pl011: Add support for computing rclk
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Authored by imp on Fri, Oct 11, 9:54 PM.

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markj
andrew
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marius
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manu
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rG28ce46d8625d: uart/pl011: Add support for computing rclk

Summary

When instructed to do so, compute the rclk (baud rate generator clock)
based on the currently programmed divisor and the communicated baud
rate. We only do this once and only for consoles that tell us the
configured rate and flag we can likely safely compute rclk.

Sponsored by: Netflix

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rG FreeBSD src repository

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Event Timeline

imp requested review of this revision.Fri, Oct 11, 9:54 PM

imp created this revision.

Harbormaster completed remote builds in B59924: Diff 144681.Fri, Oct 11, 9:54 PM

imp added a parent revision: D47076: uart/ns8250: Add support for computing rclk.Fri, Oct 11, 9:54 PM

imp added a child revision: D47078: uart: uart_getenv: check for NULL class last, not first.

andrew added inline comments.Mon, Oct 14, 11:43 AM

sys/dev/uart/uart_dev_pl011.c
247	Why `& ~3`?

Update to use proper constants for this computation. Don't know what I was
thinking before.

Harbormaster completed remote builds in B59980: Diff 144834.Mon, Oct 14, 5:14 PM

andrew accepted this revision.Tue, Oct 15, 8:12 AM

This revision is now accepted and ready to land.Tue, Oct 15, 8:12 AM

Closed by commit rG28ce46d8625d: uart/pl011: Add support for computing rclk (authored by imp). · Explain WhyTue, Oct 15, 11:01 AM

This revision was automatically updated to reflect the committed changes.

imp added a commit: rG28ce46d8625d: uart/pl011: Add support for computing rclk.

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sys/

dev/

uart/

uart_dev_pl011.c

18 lines

Diff 144884

sys/dev/uart/uart_dev_pl011.c

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