Differential D45326

riscv: Don't handle missing kernel L3 pages
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Authored by mhorne on May 23 2024, 7:53 PM.

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jrtc27
jhb

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rG3ff981587ff8: riscv: Don't handle missing kernel L3 pages

Summary

This code path should never be hit, if it does it means we did not
bootstrap correctly. Turn it into a panic like we do on amd64 and arm64.

Diff Detail

Repository

rG FreeBSD src repository

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Lint Passed

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No Test Coverage

Build Status

Buildable 57880
Build 54768: arc lint + arc unit

Event Timeline

mhorne created this revision.May 23 2024, 7:53 PM

Herald added a subscriber: imp. · View Herald TranscriptMay 23 2024, 7:53 PM

mhorne requested review of this revision.May 23 2024, 7:53 PM

Harbormaster completed remote builds in B57880: Diff 139009.May 23 2024, 7:53 PM

mhorne added a parent revision: D45325: riscv: adjust physmem reservation.May 23 2024, 7:53 PM

mhorne added a child revision: D45327: riscv: rework page table bootstrap.

I have a vague memory that this was needed at some point, but after digging for a while I can't find it. It'll be pretty obvious if the premise of the commit is wrong, so this seems ok.

This revision is now accepted and ready to land.May 27 2024, 2:07 PM

jhb accepted this revision.Jun 6 2024, 5:24 PM

Closed by commit rG3ff981587ff8: riscv: Don't handle missing kernel L3 pages (authored by mhorne). · Explain WhyJun 14 2024, 6:02 PM

This revision was automatically updated to reflect the committed changes.

mhorne added a commit: rG3ff981587ff8: riscv: Don't handle missing kernel L3 pages.

Revision Contents
Changeset List

Path

Size

sys/

riscv/

riscv/

43 lines

Diff 139009

sys/riscv/riscv/pmap.c

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