x86: Refactor pcie_cfgregopen
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Authored by jhb on Nov 28 2023, 11:49 PM.

Details

Reviewers

imp
cperciva

Commits

rG1fc6f25daf30: x86: Refactor pcie_cfgregopen
rGac64ca647dfc: x86: Refactor pcie_cfgregopen
rG9893a4fd31fa: x86: Refactor pcie_cfgregopen

Summary

Split out some bits of pcie_cfgregion that only need to be executed
once into helper functions in preparation for supporting multiple MCFG
entries.

Diff Detail

Repository

rG FreeBSD src repository

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Unit

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Build Status

Buildable 54684
Build 51573: arc lint + arc unit

Event Timeline

jhb requested review of this revision.Nov 28 2023, 11:49 PM

jhb created this revision.

Harbormaster completed remote builds in B54684: Diff 130717.Nov 28 2023, 11:49 PM

jhb added a parent revision: D42828: x86: Support multiple PCI MCFG regions.Nov 28 2023, 11:50 PM

jhb edited parent revisions, added: D42827: pci_cfgreg: Add a PCI domain argument to the low-level register API; removed: D42828: x86: Support multiple PCI MCFG regions.

jhb added a child revision: D42828: x86: Support multiple PCI MCFG regions.

imp accepted this revision.Nov 29 2023, 12:06 AM

This revision is now accepted and ready to land.Nov 29 2023, 12:06 AM

Closed by commit rG9893a4fd31fa: x86: Refactor pcie_cfgregopen (authored by jhb). · Explain WhyNov 29 2023, 6:36 PM

This revision was automatically updated to reflect the committed changes.

jhb added a commit: rG9893a4fd31fa: x86: Refactor pcie_cfgregopen.

jhb added a commit: rGac64ca647dfc: x86: Refactor pcie_cfgregopen.Jan 18 2024, 11:39 PM

jhb added a commit: rG1fc6f25daf30: x86: Refactor pcie_cfgregopen.

Revision Contents
Changeset List

Path

Size

sys/

amd64/

pci/

pci_cfgreg.c

43 lines

i386/

pci/

pci_cfgreg.c

75 lines

Diff 130717

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sys/amd64/pci/pci_cfgreg.c