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amd64: Fix two typos of loader tunables
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Authored by zlei on Oct 17 2023, 8:42 AM.
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Details

Summary

To match the sysctl MIBs and security(7).

Fixes: 2dec2b4a34b4 amd64: flush L1 data cache on syscall return with an error
Fixes: 17edf152e556 Control for Special Register Buffer Data Sampling mitigation

MFC after: 1 day

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zlei requested review of this revision.Oct 17 2023, 8:42 AM

I guess this one is also typo, but not quite sure.

static int pmap_allow_2m_x_ept;
SYSCTL_INT(_vm_pmap, OID_AUTO, allow_2m_x_ept, CTLFLAG_RWTUN | CTLFLAG_NOFETCH,
    &pmap_allow_2m_x_ept, 0,
    "Allow executable superpage mappings in EPT");
...
---TUNABLE_INT_FETCH("hw.allow_2m_x_ept", &pmap_allow_2m_x_ept);
+++TUNABLE_INT_FETCH("vm.pmap.allow_2m_x_ept", &pmap_allow_2m_x_ept);
This revision is now accepted and ready to land.Oct 18 2023, 4:52 PM
In D42249#963817, @zlei wrote:

I guess this one is also typo, but not quite sure.

static int pmap_allow_2m_x_ept;
SYSCTL_INT(_vm_pmap, OID_AUTO, allow_2m_x_ept, CTLFLAG_RWTUN | CTLFLAG_NOFETCH,
    &pmap_allow_2m_x_ept, 0,
    "Allow executable superpage mappings in EPT");
...
---TUNABLE_INT_FETCH("hw.allow_2m_x_ept", &pmap_allow_2m_x_ept);
+++TUNABLE_INT_FETCH("vm.pmap.allow_2m_x_ept", &pmap_allow_2m_x_ept);

This one is certainly inconsistency, I have no opinion which one (hw or vm.pmap) the tunable should be. The sysctl knob must be under vm.pmap of course.

This revision was automatically updated to reflect the committed changes.