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x86 msi: Enable/disable IDT vectors for MSI groups all at once
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Authored by jhb on Oct 16 2023, 5:16 PM.
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Details

Summary

Unlike MSI-X, when a device uses multiple MSI interrupts, the entire
group of interrupts are enabled/disabled at once in the relevant PCI
config register. Currently, the interrupt code enables the IDT vector
for each MSI interrupt when a handler is first registered. If the PCI
device triggers an MSI interrupt which doesn't yet have a handler,
this can trigger a panic when the Xrsvd ISR executes rather than
treating it as a stray device interrupt.

To fix, enable all the IDT vectors for an MSI group when the first
interrupt handler is configured, and don't disable the IDT vectors
until the last interrupt handler for the group is torn down.

When migrating an MSI group between CPUs, enable/disable the entire
group of IDT vectors if at least one interrupt handler is configured
for the group.

Reported by: jhay

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rG FreeBSD src repository
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Buildable 54097
Build 50987: arc lint + arc unit

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jhb requested review of this revision.Oct 16 2023, 5:16 PM
sys/x86/x86/msi.c
211

Why it makes sense to distinguish two cases? Why not always do msi_enable_group() there?

sys/x86/x86/msi.c
211

Hmm, perhaps that would all fall out naturally if msi_enabled is always true. I think it would also let me avoid checking is_handlers entirely.

Always use msi_enabled logic

sys/x86/x86/msi.c
332

Could you please explain why this line is not wrapped into the loop? Or, the comment above the block means that this reordering cannot be done?

sys/x86/x86/msi.c
332

Only groups allocate the msi_irqs array, for a single MSI interrupt or an MSI-X interrupt, msi_irqs is always NULL.

I considered setting msi_irqs in a single-count group to &msi_irq which would permit using a single loop, though a bit odd. Not sure which is worse.

This revision is now accepted and ready to land.Oct 20 2023, 5:51 PM