Removed redundant OP_RN_SP for TYPE_02, since addressing modes use Xn or SP register.
Added helper function to get Xn or SP.
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Details
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Event Timeline
sys/arm64/arm64/disassem.c | ||
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101–105 | Where does this naming/formatting come from, compared to the existing stuff? I guess from the ARM documentation? |
sys/arm64/arm64/disassem.c | ||
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101–105 | yes, it is from ARM documenation, for example https://developer.arm.com/documentation/ddi0596/2020-12/Base-Instructions/LDR--immediate---Load-Register--immediate-- LDR <Wt>, [<Xn|SP>, #<simm>]! LDR <Wt>, [<Xn|SP>], #<simm> LDR <Wt>, [<Xn|SP>{, #<pimm>}] third pattern OP <RT>, <RN>, <RM> {, EXTEND AMOUNT } in comment was wrong at all, because we use addressing mode, see else branch of TYPE_02: di->di_printf("%s\t%s, [%s, %s", i_ptr->name, arm64_reg(sf, rt, rt_sp), arm64_reg(1, rn, rn_sp), arm64_reg(option & 1, rm, rm_sp)); |