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Fix a coherent bus check in the arm64 busdma
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Authored by andrew on Apr 4 2022, 11:23 AM.
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Details

Summary

In the arm64 busdma we have an internal flag to signal when a tag is
for a cache-coherent device. In this case we don't need to adjust the
size and alignment of allocated buffers to be within a cache line.

The cache line adjustment was incorrectly using the coherent flag
passed in to bus_dma_tag_create and not the internal flag. Fix it to
use the latter to reduce the memory usage slightly.

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rS FreeBSD src repository - subversion
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Buildable 44980
Build 41868: arc lint + arc unit