We only need to ensure that interrupts are disabled when handling a
fault from iret. Otherwise it's possible to trigger the assertion
legitimately, e.g., by copying in from an invalid address.
Fixes: 4a59cbc12
Reported by: pho
Differential D30594
amd64: Relax the assertion added in commit 4a59cbc12 markj on Jun 1 2021, 2:19 PM. Authored by Tags None Referenced Files
Subscribers
Details
We only need to ensure that interrupts are disabled when handling a Fixes: 4a59cbc12
Diff Detail
Event TimelineComment Actions Ok, but I think that segment load faults should not have interrupts enabled. Since we do not context-switch them, having indefinite state for any of the segments is probably not too healthy. Comment Actions Yeah, that's why I wrote it this way originally. I missed that we handle pcb_onfault != NULL in the same block. I can add the same assertion to all of the segment load fault cases. Do you see a better approach? Comment Actions No, I think explicitly mark all cases with asserts is the only way. Or it could be a table of addresses and new %rips for segment faults, with one loop iterating over, and one assert in case of the match. But I think it is not needed (yet). Comment Actions Actually I am having trouble convincing myself that I converted to a table, it seemed quite ugly to duplicate the assertion for each case. I tested with a program that uses setcontext() to set bogus segment register values. |