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diff --git a/sys/amd64/amd64/fpu.c b/sys/amd64/amd64/fpu.c
--- a/sys/amd64/amd64/fpu.c
+++ b/sys/amd64/amd64/fpu.c
@@ -472,7 +472,8 @@
/*
* Create a table describing the layout of the CPU Extended
- * Save Area.
+ * Save Area. See Intel SDM rev. 075 Vol. 1 13.4.1 "Legacy
+ * Region of an XSAVE Area" for the source of offsets/sizes.
*/
if (use_xsave) {
xstate_bv = (uint64_t *)((char *)(fpu_initialstate + 1) +
diff --git a/sys/i386/i386/npx.c b/sys/i386/i386/npx.c
--- a/sys/i386/i386/npx.c
+++ b/sys/i386/i386/npx.c
@@ -527,7 +527,10 @@
/*
* Create a table describing the layout of the CPU Extended
- * Save Area.
+ * Save Area. See Intel SDM rev. 075 Vol. 1 13.4.1 "Legacy
+ * Region of an XSAVE Area" for the source of offsets/sizes.
+ * Note that 32bit XSAVE does not use %xmm8-%xmm15, see
+ * 10.5.1.2 and 13.5.2 "SSE State".
*/
if (use_xsave) {
xstate_bv = (uint64_t *)((char *)(npx_initialstate + 1) +

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