Hardware Trace (HWT) framework

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Summary

Hardware Trace (HWT) v0.1

HWT framework manages hardware technology that collects information about software execution and records it as "events" in highly compressed format into DRAM. The events cover information about control flow changes of a program, whether branches taken or not, exceptions taken, timing information, cycles elapsed and more. This allowing us to restore entire program flow of a given application.

Initially targeting ARM Coresight technology included into ARM64 processors.

Part2: ARM Coresight Support
Part3: hwt(8) instrumentation tool
Part4: ARM Statistical Profiling Extension (SPE) support
Part5: Intel Processor Trace (PT) support

Test Plan

Tested on ARM Morello

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Remove mtx_threads and mtx_records. Use mtx of entire context

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Add hwt_hook variable and HWT_CALL_HOOK macro

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Add hwt_hook variable and HWT_CALL_HOOK macro

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Add short overview and context lifecycle.

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Move hwt files to conf/files.

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Move changes related to coresight to another review

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In D40466#921159, @andrew wrote:

This looks like a kernel with HWT_HOOKS but not HWT wouldn't link as, for example, hwt_switch_in will be missing. HWPMC handles this by adding a function pointer and protects it with an epoch.

I added this functionality. I am not sure if epoch is needed. PMC have several macroses for hook invocation, only some of them require epoch.

We should handle multiple trace backends, e.g. CoreSight and SPE. One way to test multiple backends is to have an exception trace that logs exception info when taking one from userspace.

Yes, I added this. Looking forward to help with SPE.

sys/dev/hwt/hwt.c

349

I added option to user API so user have to specify buffer size for each thread on context allocation.

355–356

For mapping trace buffers to userspace. One device per each thread of target proc.

656

Implemented, thanks!

sys/dev/hwt/hwt.h

52

I have re-implemented this part, so we now have just one context, but multiple threads within context. Each thread has its own trace buffers and character device /dev/hwt_%pid_%tid so that user can map trace buffers.

54

It is passed from userspace to kernel, so why not

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ip range filtering (draft) added

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suspend specific thread on mmap, not entire proc

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regenerate

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Initial work on cpu/system mode of operation

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Kernel-mode tracing support added.

[andrew]

sys/kern/imgact_elf.c

1620

How are the HWT_RECORD_EXECUTABLE and HWT_RECORD_INTERP records expected to be used? They use CheriBSD specific variables.

1625–1626

Should the addr and size be related? The address is the entry point and the size appears to be the size of the section, however the entry point may not be at the start of the section.

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Remove cheribsd-specific "size" member from hwt_record as not needed

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sys/kern/imgact_elf.c

1620

these are fed into pmcstat_image_link(). Size arg is not needed so I removing it. Should work on both FreeBSD/cheribsd with minor (non-functional) changes

1625–1626

thanks "size" was used for debugging only.
pmcstat_image_link() does not require size argument, so I've removed it

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Allow tracing multiple cpus in CPU(system) mode

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Code cleanup. Implement some TODOs

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hwt kernel module added

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Regenerate

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regenerate

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Regenerate

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Fix context ID allocation, do not allocate twice and check the status of allocation

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Add description for CPU mode of operation into hwt.c

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Allow attaching to an existed proc

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Regenerate

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change backend lock, ident set lock, ownerhash lock to standard mtx

[andrew]

sys/sys/hwt.h

59 ↗

(On Diff #126853)

The cpuset_t could cause ABI issues when we bump MAXCPU. vmm.ko on amd64 was recently changed to not embed it in the struct in rGe17eca327633efc511450310afb5e4a662724e3d

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Replace most of spin locks to standard mtx. Use refcounting in some places

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Fix typo.

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User provides cpusetsize together with *cpuset_t.

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sys/sys/hwt.h

59 ↗

(On Diff #126853)

Thanks I have updated; cpusetsize is now supplied by a user; cpuset_t is now a pointer

[andrew]

Can you rebase the stack on FreeBSD so we can test on non-Morello hardware?

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rebase for freebsd

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Pass ctx to backend_deinit().

[zachary.leaf_arm.com]

sys/dev/hwt/hwt_context.c

70 ↗

(On Diff #127815)

In what situations do we have more than one hwt_context? This allocates a unique ident from 0 to 1<<8 but as far as I can tell in both hwt_ioctl_alloc_mode_{thread,cpu} we only allocate a single context aka ident 0.

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sys/dev/hwt/hwt_context.c

70 ↗

(On Diff #127815)

I guess this may happen if two users simultaneously using hwt. This is not possible in coresight, but possible in Intel PT and probably SPE ?

[zachary.leaf_arm.com]

sys/dev/hwt/hwt_context.c

70 ↗

(On Diff #127815)

Ah yep - okay makes sense. It should be possible to run Coresight and SPE simultaneously at least.

On SPE everything is per core, so you *should* be able to trace on all cores separately. Two users tracing the same core would not be possible. Not sure how that would work with THREAD_MODE, as would depend on where the task is scheduled - I guess no concurrent SPE users will be possible there. I've only implemented CPU_MODE so far.

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Regenerate

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Regenerate

[andrew]

How do you handle different conflicting modes? e.g. a user is tracing a pid & another tries to enable thread tracing. The hardware may not be able to perform both operations.

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Regenerate