allocate inpcb aligned to cachelines

[gallatin]

Summary

The inpcb struct is one of the most heavily utilized in the kernel on a busy network server. By aligning it to a cacheline boundary, we can ensure that closely related fields in the inpcb (and tcpcb) can be predictable located on the same cacheline. rrs has already done a lot of this work to put related fields on the same line for the tcbcb.

In combination with a forthcoming patch to align the start of the tcpcb, we see a roughly 3% reduction in CPU use on a busy web server serving traffic over roughly 50,000 TCP connections.

[markj]

Seems reasonable to me. The tcp_inpcb and udp_inpcb zones have an item size of 424 bytes, that yields 9 items per slab. With the new alignment I believe we'll get the same number so this change is effectively free. I wonder if UMA should automatically increase alignment to CACHE_LINE_SIZE if doing so doesn't hurt slab efficiency. Do you see any downsides to doing that?

[glebius]

In D37687#857296, @markj wrote:

Seems reasonable to me. The tcp_inpcb and udp_inpcb zones have an item size of 424 bytes, that yields 9 items per slab. With the new alignment I believe we'll get the same number so this change is effectively free. I wonder if UMA should automatically increase alignment to CACHE_LINE_SIZE if doing so doesn't hurt slab efficiency. Do you see any downsides to doing that?

I think that's a good idea!