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Differential D33390

amd64: correct size of the SSE area in the xsave layout
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Authored by kib on Dec 12 2021, 2:52 AM.
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emaste
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rG73b357be9238: amd64: correct size of the SSE area in the xsave layout
Summary

PR: https://github.com/golang/go/issues/46272

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kib created this revision.Dec 12 2021, 2:52 AM
Herald added a subscriber: imp. · View Herald TranscriptDec 12 2021, 2:52 AM
kib requested review of this revision.Dec 12 2021, 2:52 AM
emaste accepted this revision.Dec 12 2021, 6:18 PM
emaste added inline comments.
sys/amd64/amd64/fpu.c
487

Indeed, 16 128-bit XMM registers occupy 256 bytes.

I wonder if xsave_area_desc[1].size = 256 would be more clear here.

This revision is now accepted and ready to land.Dec 12 2021, 6:18 PM
emaste added a commit: rG73b357be9238: amd64: correct size of the SSE area in the xsave layout.Dec 12 2021, 11:25 PM
mpratt_google.com added a subscriber: mpratt_google.com.Dec 13 2021, 8:21 PM
mpratt_google.com added inline comments.
sys/amd64/amd64/fpu.c
487

Alternatively/additionally, a reference to the documentation source for these values would be helpful. e.g., Intel SDM Vol 1, Ch. 13.4.1 "Legacy Region of an XSAVE Area", Table 13-1 "Format of the Legacy Region of an XSAVE Area" shows these sizes and offsets.

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amd64/
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sys/amd64/amd64/fpu.c

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