Introduce new driver for NXP ENETC Ethernet controller
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Authored by kd on Jun 11 2021, 3:06 PM.

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Reviewers

mw
wma
sbruno
manu
np

Group Reviewers

iflib
manpages

Commits

rG19aa95e4b30d: Introduce new driver for NXP Ethernet controller

Summary

ENETC it a gigabit Ethernet controller found on the LS1028A board.
It supports basic VLAN offloads - tag extraction, injection and hardware filtering.
Inband MDIO connectivity is used for link status monitoring through the miibus interface.
Fixed-link mode is also supported, which allows for operation of internal cpu to switch port.
Since no admin interrupts are present in hardware, link status polling has to be used.
Due to a hardware bug software reset of the NIC results in a external abort.
Because of that most of the hardware initialization is done during attach.
This also means that in the case of an fatal error full board reset is required.
The enetc_hw.h header was imported from Linux, it is dual licensed.

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rG FreeBSD src repository

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Event Timeline

kd created this revision.Jun 11 2021, 3:06 PM

Herald added subscribers: emaste, andrew. · View Herald TranscriptJun 11 2021, 3:06 PM

kd requested review of this revision.Jun 11 2021, 3:06 PM

kd added a parent revision: D30728: iflib: Add a new quirk.

lha_semihalf.com added a child revision: D30731: Introduce LS1028A PCI MDIO driver..Jun 11 2021, 3:12 PM

manu mentioned this in D30730: Introduce MDIO read/write functions for LS1028A..Jun 11 2021, 3:26 PM

manu added a reviewer: iflib.

kd added a reviewer: manpages.Jun 11 2021, 3:33 PM

gallatin added a subscriber: gallatin.Jun 11 2021, 4:12 PM

gallatin added inline comments.

sys/dev/enetc/if_enetc.c
137	Any reason that you didn't enable LRO? This does not require device support AFAIK. Also, does this device really not even support transmit checksum offload?

andrew added inline comments.Jun 11 2021, 5:41 PM

sys/conf/files.arm64
178–179	You don't need to capitalise `soc_nxp_ls`.
sys/dev/enetc/if_enetc.c
60–61	This driver depends on `fdt`, but it seems to be missing from the config file.

bz added a subscriber: bz.Jun 11 2021, 6:43 PM

Don't capitalize soc_nxp_ls.

kd added inline comments.Jun 14 2021, 9:04 AM

sys/conf/files.arm64
178–179	done
sys/dev/enetc/if_enetc.c
60–61	I'm pretty much sure that the 'fdt' is present. I don't require it for `dev/enetc/enetc_mdio.c`, but I don't think it is needed there.
137	If I understand correctly LRO is usable only if L4 checksum has been calculated in hardware. (sys/net/iflib.c:3033) TX checksum offload it is not supported. There is no mention of it in documentation, Linux driver doesn't enable it either. In general the selection of offloads implemented in this NIC is somewhat weird. We have VLAN related offloads, PTP, (not implemented in this driver) but the the TX checksum is missing.

gallatin added inline comments.Jun 14 2021, 7:23 PM

sys/dev/enetc/if_enetc.c
137	Yes, it seems more of a switch chip, given the feature set. The chip has passed you a checksum. See mxge_rx_csum() for an example of what to do when the NIC passes you a checksum and does not validate it.

kd added inline comments.Jun 16 2021, 1:15 PM

sys/dev/enetc/if_enetc.c
137	I'm pretty much sure that the checksum is validated. Apart from it NIC also passes a 16 bit parser status. I checked it manually and the error bit within it is set when the ip checksum is incorrect. Frames with wrong FCS are automatically dropped, L4 checksum is not checked in hardware, so there is no ambiguity. With that in mind should I be doing something extra with that checksum from the NIC?