sdhci_fsl_fdt.c: Specify base clk divisor per SoC.
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Authored by lha_semihalf.com on May 5 2021, 1:56 PM.

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mw
ar_semihalf.com
manu
mmel

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rGd5b20eaafc0b: sdhci_fsl_fdt: specify base clk divisor per SoC

Summary

Only ls1046a and ls1028a require the base clk to be divided by 2.
Implement that by moving the divider to a SoC specific data.
This commit fixes base clk setup for the entire SoC family,
including the already suported LS2160A.

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rG FreeBSD src repository

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lha_semihalf.com requested review of this revision.May 5 2021, 1:56 PM

lha_semihalf.com created this revision.

lha_semihalf.com added a child revision: D30121: sdhci_fsl_fdt.c: Add support for LS1028a..May 5 2021, 2:03 PM

@manu @mmel Could you try to boot LS2160A with this patchset applied?

manu accepted this revision.May 5 2021, 3:39 PM

This revision is now accepted and ready to land.May 5 2021, 3:39 PM

Closed by commit rGd5b20eaafc0b: sdhci_fsl_fdt: specify base clk divisor per SoC (authored by mw). · Explain WhyMay 7 2021, 1:50 AM

This revision was automatically updated to reflect the committed changes.

mw added a commit: rGd5b20eaafc0b: sdhci_fsl_fdt: specify base clk divisor per SoC.

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sys/

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sdhci/

sdhci_fsl_fdt.c

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sys/dev/sdhci/sdhci_fsl_fdt.c

sdhci_fsl_fdt.c: Specify base clk divisor per SoC. ClosedPublicActions