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- Excercise all atomics from a test module?
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sys/sys/_atomic64e.h | ||
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1 ↗ | (On Diff #66165) | I think it's not unlikely that some other 32bit platform may find it useful. |
If it makes sense to move them to sys/powerpc later, we can do that.
sys/sys/_atomic64e.h | ||
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1 ↗ | (On Diff #66165) | I agree. But if none others will make use of them (I've heard mips32 is UP only, so would probably take a much different route for atomic64), it doesn't make sense to keep it generic. But, I won't block the review on that. |
I'd add Kyle Evans to this review.
Mips32 does have SMP, but the specific core has 64bit atomics if anybody wants to revive it.
sys/kern/subr_atomic64.c | ||
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1 ↗ | (On Diff #66165) | Kyle is working on this for mips32 too... |
LGTM, added it to mips o32 with this diff: https://people.freebsd.org/~kevans/mips-atomic64.diff
sys/sys/_atomic64e.h | ||
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39 ↗ | (On Diff #66165) | Maybe rename this to HAS_EMULATED_ATOMIC64 or something like that since we'll use it for mips, too. |
sys/kern/subr_atomic64.c | ||
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57 ↗ | (On Diff #66165) | There is alright a macro for this. CACHE_LINE_SIZE |
sys/sys/_atomic64e.h | ||
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44 ↗ | (On Diff #66165) | These declarations should also be included in the above _KERNEL check to hide them from userland |
sys/kern/subr_atomic64.c | ||
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57 ↗ | (On Diff #66165) | We need to make sure this can be option in kernel config file... unless CACHE LINE SIZE already does that... |