HomeFreeBSD

riscv: fix L0 PTE setup (Sv48)

Description

riscv: fix L0 PTE setup (Sv48)

Per the Privilege Spec, the Accessed (A) or Dirty (D) bits must only be
set for a leaf PTE.

It seems newer versions of QEMU have started to enforce this
requirement, and without this change, pmap_bootstrap() hangs when
switching to Sv48 mode.

Reviewed by: jrtc27, markj
MFC after: 3 days
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D45210

Details

Provenance
mhorneAuthored on May 15 2024, 5:07 PM
Reviewer
jrtc27
Differential Revision
D45210: riscv: fix L0 PTE setup (Sv48)
Parents
rGfc59fc3c1f63: uart: Honour clock-frequency in FDT for UART_FDT_CLASS if present
Branches
Unknown
Tags
Unknown