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arm64/disassem.c: Add detection of xzr and sp

Description

arm64/disassem.c: Add detection of xzr and sp

Added support to distinguish between XZR/WZR and SP/WSP registers.

Add new OP_ flags to indicate if the instruction allows the use of SP
for a given register field. "wSP" and "SP" are removed from w_reg and
x_reg, and helper functions are introduced for this purpose of detecting
the correct name of the x31 register.

mhorne: While here, adjust some whitespace issues from a previous
commit.

Reviewed by: mhorne
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D39862

(cherry picked from commit 9f60b8ce6085049c3886c3e2eb8d4034cef56627)

Details

Provenance
koliagogsadze_gmail.comAuthored on May 8 2023, 1:39 PM
mhorneCommitted on Jun 9 2023, 7:48 PM
Reviewer
mhorne
Differential Revision
D39862: arm64/disassem.c: Add detection of xzr and sp
Parents
rGe61a69e88a03: ofw_cpu: quiet secondary CPU devices
Branches
Unknown
Tags
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