Add support for UART found in the Ingenic XBurst system on chips.
These CPUs has non-standard UART enable bit hidden in the UART FIFO
Control Register.
Sponsored by: DARPA, AFRL
Description
Description
Details
Details
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br Authored on Nov 17 2016, 2:41 PM - Parents
- rG310dc5a403c9: Writing out the L2TP control packet requires 12 bytes of
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