HomeFreeBSD

riscv: handle misaligned address exceptions

Description

riscv: handle misaligned address exceptions

If this exception is coming from userspace, send the appropriate SIGBUS
to the process. If it's coming from the kernel this is still fatal, but
we can give a better panic message.

Typical misaligned loads/stores are emulated by the SBI firmware, and
require no intervention from our kernel. The notable exception here is
misaligned access with atomic instructions. These can generate the
exception and panic seen in the PR.

With this, we now handle all defined exception types.

PR: 266109
MFC after: 1 week
Found by: syzkaller
Reported by: P1umer <p1umer1337@gmail.com>
Differential Revision: https://reviews.freebsd.org/D36876

Details

Provenance
mhorneAuthored on Oct 11 2022, 1:39 PM
Differential Revision
D36876: riscv: handle misaligned address exceptions
Parents
rG6e6c45e66f68: nanobsd: update copies of SSH config files
Branches
Unknown
Tags
Unknown