powerpc/mpc85xx: Use the proper (EREF) form of writing to DBCR0

DBCR0, according to the Freescale EREF, is guaranteed to be updated, and
changes take effect, after an isync plus change of MSR[DE] from 0 to 1.
Otherwise it's guaranteed to be updated "eventually". Use the expected
synchronization sequence to write it for resetting.

This prevents "Reset failed" from being printed immediately before the CPU
resets.

MFC after: 2 weeks