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Enable arm,io-coherent property of PL310 L2 cache on Armada 38x platforms

Description

Enable arm,io-coherent property of PL310 L2 cache on Armada 38x platforms

This patch disables outer cache sync in PL310 driver
by adding "arm,io-coherent" property. In addition to
the previous patches it was the last bit needed
for enabling proper operation of Armada 38x SoCs
with the IO cache coherency.

Submitted by: Michal Mazur <mkm@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Reviewed by: mmel
Differential revision: https://reviews.freebsd.org/D11204

Details

Provenance
zbbAuthored on Jun 21 2017, 6:28 PM
Parents
rG3361fdc43161: Create root DMA tag and fix MBUS windows on DMA coherent platforms
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