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pci: Don't cache the count of MSI/MSI-X messages before allocation

Description

pci: Don't cache the count of MSI/MSI-X messages before allocation

A device can in theory change the read-only fields in the MSI/MSI-X
control registers that indicate the maximum number of supported
registers in response to changing other device registers. For
example, certain Intel networking VFs change the number of messages as
a result of changes in the PCI_IOV_ADD_VF callback.

To support this, always read the current value of the relevant control
register in the *_count and *_alloc methods. Once messages have been
allocated, the control register value remains cached.

Reported by: Krzysztof Galazka <krzysztof.galazka@intel.com>
Reviewed by: Krzysztof Galazka <krzysztof.galazka@intel.com>, erj
Differential Revision: https://reviews.freebsd.org/D48890

Details

Provenance
jhbAuthored on Tue, Feb 11, 2:11 PM
Reviewer
erj
Differential Revision
D48890: pci: Don't cache the count of MSI/MSI-X messages before allocation
Parents
rGa3835cceb088: pci: Cosmetic cleanups to MSI/MSI-X routines
Branches
Unknown
Tags
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