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e1000: expose FEXTNVM registers and masks

Description

e1000: expose FEXTNVM registers and masks

Adding defines for FEXTNVM8 and FEXTNVM12 registers with new masks for
future use.

Signed-off-by: Nir Efrati <nir.efrati@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
Reviewed-by: Wei Zhao <wei.zhao1@intel.com>

Approved by: imp
Obtained from: DPDK (6d208ec099cd870a73c6b444b350a82c7a26c5e4)
MFC after: 1 week

(cherry picked from commit de965d042fa4d341cec3fa7cacac0f30f224bde4)

Details

Provenance
Guinan Sun <guinanx.sun@intel.com>Authored on Jul 6 2020, 8:12 AM
Kevin Bowling <kbowling@FreeBSD.org>Committed on Sep 24 2021, 1:30 AM
Parents
rGb81b96fee23b: e1000: add missed define for VFTA
Branches
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Tags
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Event Timeline

Kevin Bowling <kbowling@FreeBSD.org> committed rG270d34d745b1: e1000: expose FEXTNVM registers and masks (authored by Guinan Sun <guinanx.sun@intel.com>).Sep 24 2021, 1:30 AM