x86: Introduce APIC ID limit by default on AMD hardware

Lack of an AMD IOMMU driver means we cannot successfully route
interrupts to APIC IDs 255 and over. Do not add the corresponding CPUs
to the per-domain lists of CPUs to which interrupts can be assigned.

This change should be reverted (or, at least the APIC ID limit) once we
have an AMD IOMMU / interrupt remapping driver.

See also commits fa5f94140a83 ("msi: handle error from BUS_REMAP_INTR in
msi_assign_cpu") and 4258eb5a0d97 ("x86: handle domains with no CPUs
usable for intr delivery.").

Reviewed by: markj, jhb
Tested by: cperciva (earlier version)
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D41618

(cherry picked from commit 0b029e9e85943d565c72aa58353538aeac68aa36)

Approved by: re (kib)