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D41827.diff
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D41827.diff

diff --git a/sys/arm64/arm64/elf32_machdep.c b/sys/arm64/arm64/elf32_machdep.c
--- a/sys/arm64/arm64/elf32_machdep.c
+++ b/sys/arm64/arm64/elf32_machdep.c
@@ -231,7 +231,7 @@
/*
* Reconstruct the pc to point at the swi.
*/
- if ((frame->tf_spsr & PSR_T) != 0)
+ if ((frame->tf_spsr & PSR_32_T) != 0)
frame->tf_elr -= 2; //THUMB_INSN_SIZE;
else
frame->tf_elr -= 4; //INSN_SIZE;
@@ -268,7 +268,7 @@
tf->tf_elr = imgp->entry_addr;
tf->tf_spsr = PSR_M4_32;
if ((uint32_t)imgp->entry_addr & 1)
- tf->tf_spsr |= PSR_T;
+ tf->tf_spsr |= PSR_32_T;
#ifdef VFP
vfp_reset_state(td, pcb);
diff --git a/sys/arm64/arm64/freebsd32_machdep.c b/sys/arm64/arm64/freebsd32_machdep.c
--- a/sys/arm64/arm64/freebsd32_machdep.c
+++ b/sys/arm64/arm64/freebsd32_machdep.c
@@ -428,9 +428,9 @@
*(sysent->sv_szsigcode));
/* Set the mode to enter in the signal handler */
if ((register_t)catcher & 1)
- tf->tf_spsr |= PSR_T;
+ tf->tf_spsr |= PSR_32_T;
else
- tf->tf_spsr &= ~PSR_T;
+ tf->tf_spsr &= ~PSR_32_T;
/* Clear the single step flag while in the signal handler */
if ((td->td_pcb->pcb_flags & PCB_SINGLE_STEP) != 0) {
diff --git a/sys/arm64/arm64/undefined.c b/sys/arm64/arm64/undefined.c
--- a/sys/arm64/arm64/undefined.c
+++ b/sys/arm64/arm64/undefined.c
@@ -214,7 +214,7 @@
* safely bail out if we're in Thumb mode.
*/
if (!compat32_emul_swp || !SV_PROC_FLAG(td->td_proc, SV_ILP32) ||
- (frame->tf_spsr & PSR_T) != 0)
+ (frame->tf_spsr & PSR_32_T) != 0)
return (0);
else if ((insn & 0x0fb00ff0) != 0x01000090)
return (0);
diff --git a/sys/arm64/arm64/vm_machdep.c b/sys/arm64/arm64/vm_machdep.c
--- a/sys/arm64/arm64/vm_machdep.c
+++ b/sys/arm64/arm64/vm_machdep.c
@@ -216,7 +216,7 @@
if ((td->td_frame->tf_spsr & PSR_M4_MASK) == PSR_M4_32) {
tf->tf_x[13] = STACKALIGN((uintptr_t)stack->ss_sp + stack->ss_size);
if ((register_t)entry & 1)
- tf->tf_spsr |= PSR_T;
+ tf->tf_spsr |= PSR_32_T;
} else
tf->tf_sp = STACKALIGN((uintptr_t)stack->ss_sp + stack->ss_size);
tf->tf_elr = (register_t)entry;
diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h
--- a/sys/arm64/include/armreg.h
+++ b/sys/arm64/include/armreg.h
@@ -2053,7 +2053,7 @@
#define PSR_M4_64 (0x0UL << PSR_M4_SHIFT)
#define PSR_M4_32 (0x1UL << PSR_M4_SHIFT)
-#define PSR_T (0x1UL << 5)
+#define PSR_32_T (0x1UL << 5)
#define PSR_F (0x1UL << 6)
#define PSR_I (0x1UL << 7)

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