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D34271.diff
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diff --git a/sys/riscv/include/cpufunc.h b/sys/riscv/include/cpufunc.h
--- a/sys/riscv/include/cpufunc.h
+++ b/sys/riscv/include/cpufunc.h
@@ -120,13 +120,6 @@
#define cpu_icache_sync_range(a, s)
#define cpu_icache_sync_range_checked(a, s)
-static __inline void
-load_satp(uint64_t val)
-{
-
- __asm __volatile("csrw satp, %0" :: "r"(val));
-}
-
#define cpufunc_nullop() riscv_nullop()
void riscv_nullop(void);
diff --git a/sys/riscv/riscv/pmap.c b/sys/riscv/riscv/pmap.c
--- a/sys/riscv/riscv/pmap.c
+++ b/sys/riscv/riscv/pmap.c
@@ -4402,7 +4402,7 @@
pmap = vmspace_pmap(td->td_proc->p_vmspace);
if (pmap == oldpmap)
return;
- load_satp(pmap->pm_satp);
+ csr_write(satp, pmap->pm_satp);
hart = PCPU_GET(hart);
#ifdef SMP
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D34271.diff (744 B)
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D34271: riscv: Use generic CSR macros for writing SATP
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