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D44344.diff
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D44344.diff

diff --git a/sys/arm64/arm64/db_interface.c b/sys/arm64/arm64/db_interface.c
--- a/sys/arm64/arm64/db_interface.c
+++ b/sys/arm64/arm64/db_interface.c
@@ -155,7 +155,7 @@
db_write_bytes(vm_offset_t addr, size_t size, char *data)
{
jmp_buf jb;
- void *prev_jb;
+ void *prev_jb, *kaddr;
char *dst;
size_t i;
int ret;
@@ -163,7 +163,7 @@
prev_jb = kdb_jmpbuf(jb);
ret = setjmp(jb);
if (ret == 0) {
- if (!arm64_get_writable_addr(addr, &addr)) {
+ if (!arm64_get_writable_addr((void *)addr, &kaddr)) {
ret = 1;
} else {
dst = (char *)addr;
@@ -175,7 +175,7 @@
* Ensure the I & D cache are in sync if we wrote
* to executable memory.
*/
- cpu_icache_sync_range((void *)addr, (vm_size_t)size);
+ cpu_icache_sync_range(kaddr, size);
}
}
(void)kdb_jmpbuf(prev_jb);
diff --git a/sys/arm64/arm64/machdep.c b/sys/arm64/arm64/machdep.c
--- a/sys/arm64/arm64/machdep.c
+++ b/sys/arm64/arm64/machdep.c
@@ -424,12 +424,12 @@
* read-only, e.g. to patch kernel code.
*/
bool
-arm64_get_writable_addr(vm_offset_t addr, vm_offset_t *out)
+arm64_get_writable_addr(void *addr, void **out)
{
vm_paddr_t pa;
/* Check if the page is writable */
- if (PAR_SUCCESS(arm64_address_translate_s1e1w(addr))) {
+ if (PAR_SUCCESS(arm64_address_translate_s1e1w((vm_offset_t)addr))) {
*out = addr;
return (true);
}
@@ -437,7 +437,7 @@
/*
* Find the physical address of the given page.
*/
- if (!pmap_klookup(addr, &pa)) {
+ if (!pmap_klookup((vm_offset_t)addr, &pa)) {
return (false);
}
@@ -445,8 +445,9 @@
* If it is within the DMAP region and is writable use that.
*/
if (PHYS_IN_DMAP(pa)) {
- addr = PHYS_TO_DMAP(pa);
- if (PAR_SUCCESS(arm64_address_translate_s1e1w(addr))) {
+ addr = (void *)PHYS_TO_DMAP(pa);
+ if (PAR_SUCCESS(arm64_address_translate_s1e1w(
+ (vm_offset_t)addr))) {
*out = addr;
return (true);
}
diff --git a/sys/arm64/include/cpufunc.h b/sys/arm64/include/cpufunc.h
--- a/sys/arm64/include/cpufunc.h
+++ b/sys/arm64/include/cpufunc.h
@@ -191,7 +191,7 @@
void arm64_dcache_wbinv_range(void *, vm_size_t);
void arm64_dcache_inv_range(void *, vm_size_t);
void arm64_dcache_wb_range(void *, vm_size_t);
-bool arm64_get_writable_addr(vm_offset_t, vm_offset_t *);
+bool arm64_get_writable_addr(void *, void **);
#endif /* _KERNEL */
#endif /* _MACHINE_CPUFUNC_H_ */
diff --git a/sys/cddl/dev/fbt/aarch64/fbt_isa.c b/sys/cddl/dev/fbt/aarch64/fbt_isa.c
--- a/sys/cddl/dev/fbt/aarch64/fbt_isa.c
+++ b/sys/cddl/dev/fbt/aarch64/fbt_isa.c
@@ -71,9 +71,9 @@
void
fbt_patch_tracepoint(fbt_probe_t *fbt, fbt_patchval_t val)
{
- vm_offset_t addr;
+ void *addr;
- if (!arm64_get_writable_addr((vm_offset_t)fbt->fbtp_patchpoint, &addr))
+ if (!arm64_get_writable_addr(fbt->fbtp_patchpoint, &addr))
panic("%s: Unable to write new instruction", __func__);
*(fbt_patchval_t *)addr = val;
diff --git a/sys/cddl/dev/kinst/aarch64/kinst_isa.c b/sys/cddl/dev/kinst/aarch64/kinst_isa.c
--- a/sys/cddl/dev/kinst/aarch64/kinst_isa.c
+++ b/sys/cddl/dev/kinst/aarch64/kinst_isa.c
@@ -235,9 +235,9 @@
void
kinst_patch_tracepoint(struct kinst_probe *kp, kinst_patchval_t val)
{
- vm_offset_t addr;
+ void *addr;
- if (!arm64_get_writable_addr((vm_offset_t)kp->kp_patchpoint, &addr))
+ if (!arm64_get_writable_addr(kp->kp_patchpoint, &addr))
panic("%s: Unable to write new instruction", __func__);
*(kinst_patchval_t *)addr = val;
cpu_icache_sync_range(kp->kp_patchpoint, INSN_SIZE);

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