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diff --git a/sys/dev/cxgbe/t4_l2t.h b/sys/dev/cxgbe/t4_l2t.h
--- a/sys/dev/cxgbe/t4_l2t.h
+++ b/sys/dev/cxgbe/t4_l2t.h
@@ -35,8 +35,6 @@
#define V_SYNC_WR(x) ((x) << S_SYNC_WR)
#define F_SYNC_WR V_SYNC_WR(1)
-enum { L2T_SIZE = 4096 }; /* # of L2T entries */
-
enum {
L2T_STATE_VALID, /* entry is up to date */
L2T_STATE_STALE, /* entry may be used but needs revalidation */
diff --git a/sys/dev/cxgbe/t4_l2t.c b/sys/dev/cxgbe/t4_l2t.c
--- a/sys/dev/cxgbe/t4_l2t.c
+++ b/sys/dev/cxgbe/t4_l2t.c
@@ -369,14 +369,19 @@
do_l2t_write_rpl(struct sge_iq *iq, const struct rss_header *rss,
struct mbuf *m)
{
+ struct adapter *sc = iq->adapter;
const struct cpl_l2t_write_rpl *rpl = (const void *)(rss + 1);
- unsigned int tid = GET_TID(rpl);
- unsigned int idx = tid % L2T_SIZE;
+ const u_int hwidx = GET_TID(rpl) & ~(F_SYNC_WR | V_TID_QID(M_TID_QID));
+ const bool sync = GET_TID(rpl) & F_SYNC_WR;
- if (__predict_false(rpl->status != CPL_ERR_NONE)) {
- log(LOG_ERR,
- "Unexpected L2T_WRITE_RPL (%u) for entry at hw_idx %u\n",
- rpl->status, idx);
+ MPASS(iq->abs_id == G_TID_QID(GET_TID(rpl)));
+
+ if (__predict_false(hwidx < sc->vres.l2t.start) ||
+ __predict_false(hwidx >= sc->vres.l2t.start + sc->vres.l2t.size) ||
+ __predict_false(rpl->status != CPL_ERR_NONE)) {
+ CH_ERR(sc, "%s: hwidx %u, rpl %u, sync %u; L2T st %u, sz %u\n",
+ __func__, hwidx, rpl->status, sync, sc->vres.l2t.start,
+ sc->vres.l2t.size);
return (EINVAL);
}
diff --git a/sys/dev/cxgbe/t4_main.c b/sys/dev/cxgbe/t4_main.c
--- a/sys/dev/cxgbe/t4_main.c
+++ b/sys/dev/cxgbe/t4_main.c
@@ -5262,9 +5262,9 @@
}
sc->vres.l2t.start = val[4];
sc->vres.l2t.size = val[5] - val[4] + 1;
- KASSERT(sc->vres.l2t.size <= L2T_SIZE,
- ("%s: L2 table size (%u) larger than expected (%u)",
- __func__, sc->vres.l2t.size, L2T_SIZE));
+ /* val[5] is the last hwidx and it must not collide with F_SYNC_WR */
+ if (sc->vres.l2t.size > 0)
+ MPASS(fls(val[5]) <= S_SYNC_WR);
sc->params.core_vdd = val[6];
param[0] = FW_PARAM_PFVF(IQFLINT_END);
diff --git a/sys/dev/cxgbe/tom/t4_tom_l2t.c b/sys/dev/cxgbe/tom/t4_tom_l2t.c
--- a/sys/dev/cxgbe/tom/t4_tom_l2t.c
+++ b/sys/dev/cxgbe/tom/t4_tom_l2t.c
@@ -318,18 +318,23 @@
{
struct adapter *sc = iq->adapter;
const struct cpl_l2t_write_rpl *rpl = (const void *)(rss + 1);
- unsigned int tid = GET_TID(rpl);
- unsigned int idx = tid % L2T_SIZE;
+ const u_int hwidx = GET_TID(rpl) & ~(F_SYNC_WR | V_TID_QID(M_TID_QID));
+ const bool sync = GET_TID(rpl) & F_SYNC_WR;
- if (__predict_false(rpl->status != CPL_ERR_NONE)) {
- log(LOG_ERR,
- "Unexpected L2T_WRITE_RPL (%u) for entry at hw_idx %u\n",
- rpl->status, idx);
+ MPASS(iq->abs_id == G_TID_QID(GET_TID(rpl)));
+
+ if (__predict_false(hwidx < sc->vres.l2t.start) ||
+ __predict_false(hwidx >= sc->vres.l2t.start + sc->vres.l2t.size) ||
+ __predict_false(rpl->status != CPL_ERR_NONE)) {
+ CH_ERR(sc, "%s: hwidx %u, rpl %u, sync %u; L2T st %u, sz %u\n",
+ __func__, hwidx, rpl->status, sync, sc->vres.l2t.start,
+ sc->vres.l2t.size);
return (EINVAL);
}
- if (tid & F_SYNC_WR) {
- struct l2t_entry *e = &sc->l2t->l2tab[idx - sc->vres.l2t.start];
+ if (sync) {
+ const u_int idx = hwidx - sc->vres.l2t.start;
+ struct l2t_entry *e = &sc->l2t->l2tab[idx];
mtx_lock(&e->lock);
if (e->state != L2T_STATE_SWITCHING) {

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