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diff --git a/sys/dev/ichiic/ig4_acpi.c b/sys/dev/ichiic/ig4_acpi.c
--- a/sys/dev/ichiic/ig4_acpi.c
+++ b/sys/dev/ichiic/ig4_acpi.c
@@ -108,7 +108,7 @@
ig4iic_acpi_detach(dev);
return (ENXIO);
}
- sc->platform_attached = 1;
+ sc->platform_attached = true;
error = ig4iic_attach(sc);
if (error)
@@ -127,7 +127,7 @@
error = ig4iic_detach(sc);
if (error)
return (error);
- sc->platform_attached = 0;
+ sc->platform_attached = false;
}
if (sc->intr_res) {
diff --git a/sys/dev/ichiic/ig4_iic.c b/sys/dev/ichiic/ig4_iic.c
--- a/sys/dev/ichiic/ig4_iic.c
+++ b/sys/dev/ichiic/ig4_iic.c
@@ -337,9 +337,9 @@
{
uint32_t tar;
uint32_t ctl;
- int use_10bit;
+ bool use_10bit;
- use_10bit = 0;
+ use_10bit = false;
if (sc->slave_valid && sc->last_slave == slave &&
sc->use_10bit == use_10bit) {
return;
@@ -364,7 +364,7 @@
reg_write(sc, IG4_REG_CTL, ctl);
reg_write(sc, IG4_REG_TAR_ADD, tar);
set_controller(sc, IG4_I2C_ENABLE);
- sc->slave_valid = 1;
+ sc->slave_valid = true;
sc->last_slave = slave;
}
@@ -1009,7 +1009,7 @@
(sc->cfg.bus_speed & IG4_CTL_SPEED_MASK));
/* Force setting of the target address on the next transfer */
- sc->slave_valid = 0;
+ sc->slave_valid = false;
return (0);
}
diff --git a/sys/dev/ichiic/ig4_pci.c b/sys/dev/ichiic/ig4_pci.c
--- a/sys/dev/ichiic/ig4_pci.c
+++ b/sys/dev/ichiic/ig4_pci.c
@@ -316,7 +316,7 @@
ig4iic_pci_detach(dev);
return (ENXIO);
}
- sc->platform_attached = 1;
+ sc->platform_attached = true;
error = ig4iic_attach(sc);
if (error)
@@ -335,7 +335,7 @@
error = ig4iic_detach(sc);
if (error)
return (error);
- sc->platform_attached = 0;
+ sc->platform_attached = false;
}
if (sc->intr_res) {
diff --git a/sys/dev/ichiic/ig4_var.h b/sys/dev/ichiic/ig4_var.h
--- a/sys/dev/ichiic/ig4_var.h
+++ b/sys/dev/ichiic/ig4_var.h
@@ -91,10 +91,10 @@
struct ig4_cfg cfg;
uint32_t intr_mask;
uint8_t last_slave;
- int platform_attached : 1;
- int use_10bit : 1;
- int slave_valid : 1;
- int poll: 1;
+ bool platform_attached : 1;
+ bool use_10bit : 1;
+ bool slave_valid : 1;
+ bool poll: 1;
/*
* Locking semantics:

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