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D45554.id140779.diff
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diff --git a/sys/dev/acpica/acpi.c b/sys/dev/acpica/acpi.c
--- a/sys/dev/acpica/acpi.c
+++ b/sys/dev/acpica/acpi.c
@@ -55,6 +55,8 @@
#if defined(__i386__) || defined(__amd64__)
#include <machine/clock.h>
#include <machine/pci_cfgreg.h>
+#include <x86/cputypes.h>
+#include <x86/x86_var.h>
#endif
#include <machine/resource.h>
#include <machine/bus.h>
@@ -297,6 +299,10 @@
SYSCTL_INT(_debug_acpi, OID_AUTO, suspend_bounce, CTLFLAG_RW,
&acpi_susp_bounce, 0, "Don't actually suspend, just test devices.");
+#if defined(__amd64__) || defined(__i386__)
+int acpi_override_isa_irq_polarity;
+#endif
+
/*
* ACPI standard UUID for Device Specific Data Package
* "Device Properties UUID for _DSD" Rev. 2.0
@@ -611,6 +617,19 @@
OID_AUTO, "handle_reboot", CTLFLAG_RW,
&sc->acpi_handle_reboot, 0, "Use ACPI Reset Register to reboot");
+#if defined(__amd64__) || defined(__i386__)
+ /*
+ * Enable workaround for incorrect ISA IRQ polarity by default on
+ * systems with Intel CPUs.
+ */
+ if (cpu_vendor_id == CPU_VENDOR_INTEL)
+ acpi_override_isa_irq_polarity = 1;
+ SYSCTL_ADD_INT(&sc->acpi_sysctl_ctx, SYSCTL_CHILDREN(sc->acpi_sysctl_tree),
+ OID_AUTO, "override_isa_irq_polarity", CTLFLAG_RDTUN,
+ &acpi_override_isa_irq_polarity, 0,
+ "Force active-hi polarity for edge-triggered ISA IRQs");
+#endif
+
/*
* Default to 1 second before sleeping to give some machines time to
* stabilize.
diff --git a/sys/dev/acpica/acpi_resource.c b/sys/dev/acpica/acpi_resource.c
--- a/sys/dev/acpica/acpi_resource.c
+++ b/sys/dev/acpica/acpi_resource.c
@@ -159,13 +159,8 @@
}
#if defined(__amd64__) || defined(__i386__)
- /*
- * XXX: Certain BIOSes have buggy AML that specify an IRQ that is
- * edge-sensitive and active-lo. However, edge-sensitive IRQs
- * should be active-hi. Force IRQs with an ISA IRQ value to be
- * active-hi instead.
- */
- if (irq < 16 && trig == ACPI_EDGE_SENSITIVE && pol == ACPI_ACTIVE_LOW)
+ if (irq < 16 && trig == ACPI_EDGE_SENSITIVE && pol == ACPI_ACTIVE_LOW &&
+ acpi_override_isa_irq_polarity)
pol = ACPI_ACTIVE_HIGH;
#endif
BUS_CONFIG_INTR(dev, irq, (trig == ACPI_EDGE_SENSITIVE) ?
diff --git a/sys/dev/acpica/acpivar.h b/sys/dev/acpica/acpivar.h
--- a/sys/dev/acpica/acpivar.h
+++ b/sys/dev/acpica/acpivar.h
@@ -234,6 +234,18 @@
#define ACPI_Q_TIMER (1 << 1)
#define ACPI_Q_MADT_IRQ0 (1 << 2)
+#if defined(__amd64__) || defined(__i386__)
+/*
+ * Certain Intel BIOSes have buggy AML that specify an IRQ that is
+ * edge-sensitive and active-lo. Normally, edge-sensitive IRQs should
+ * be active-hi. If this value is non-zero, edge-sensitive ISA IRQs
+ * are forced to be active-hi instead. At least some AMD systems use
+ * active-lo edge-sensitive ISA IRQs, so this setting is only enabled
+ * by default on systems with Intel CPUs.
+ */
+extern int acpi_override_isa_irq_polarity;
+#endif
+
/*
* Plug and play information for device matching. Matching table format
* is compatible with ids parameter of ACPI_ID_PROBE bus method.
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D45554: acpi: Narrow workaround for broken interrupt settings on x86
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