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diff --git a/usr.sbin/bhyve/acpi.c b/usr.sbin/bhyve/acpi.c
--- a/usr.sbin/bhyve/acpi.c
+++ b/usr.sbin/bhyve/acpi.c
@@ -242,223 +242,6 @@
return (errno);
}
-static int
-basl_fwrite_fadt(FILE *fp)
-{
- EFPRINTF(fp, "/*\n");
- EFPRINTF(fp, " * bhyve FADT template\n");
- EFPRINTF(fp, " */\n");
- EFPRINTF(fp, "[0004]\t\tSignature : \"FACP\"\n");
- EFPRINTF(fp, "[0004]\t\tTable Length : 0000010C\n");
- EFPRINTF(fp, "[0001]\t\tRevision : 05\n");
- EFPRINTF(fp, "[0001]\t\tChecksum : 00\n");
- EFPRINTF(fp, "[0006]\t\tOem ID : \"BHYVE \"\n");
- EFPRINTF(fp, "[0008]\t\tOem Table ID : \"BVFACP \"\n");
- EFPRINTF(fp, "[0004]\t\tOem Revision : 00000001\n");
- /* iasl will fill in the compiler ID/revision fields */
- EFPRINTF(fp, "[0004]\t\tAsl Compiler ID : \"xxxx\"\n");
- EFPRINTF(fp, "[0004]\t\tAsl Compiler Revision : 00000000\n");
- EFPRINTF(fp, "\n");
-
- EFPRINTF(fp, "[0004]\t\tFACS Address : %08X\n",
- basl_acpi_base + FACS_OFFSET);
- EFPRINTF(fp, "[0004]\t\tDSDT Address : %08X\n",
- basl_acpi_base + DSDT_OFFSET);
- EFPRINTF(fp, "[0001]\t\tModel : 01\n");
- EFPRINTF(fp, "[0001]\t\tPM Profile : 00 [Unspecified]\n");
- EFPRINTF(fp, "[0002]\t\tSCI Interrupt : %04X\n",
- SCI_INT);
- EFPRINTF(fp, "[0004]\t\tSMI Command Port : %08X\n",
- SMI_CMD);
- EFPRINTF(fp, "[0001]\t\tACPI Enable Value : %02X\n",
- BHYVE_ACPI_ENABLE);
- EFPRINTF(fp, "[0001]\t\tACPI Disable Value : %02X\n",
- BHYVE_ACPI_DISABLE);
- EFPRINTF(fp, "[0001]\t\tS4BIOS Command : 00\n");
- EFPRINTF(fp, "[0001]\t\tP-State Control : 00\n");
- EFPRINTF(fp, "[0004]\t\tPM1A Event Block Address : %08X\n",
- PM1A_EVT_ADDR);
- EFPRINTF(fp, "[0004]\t\tPM1B Event Block Address : 00000000\n");
- EFPRINTF(fp, "[0004]\t\tPM1A Control Block Address : %08X\n",
- PM1A_CNT_ADDR);
- EFPRINTF(fp, "[0004]\t\tPM1B Control Block Address : 00000000\n");
- EFPRINTF(fp, "[0004]\t\tPM2 Control Block Address : 00000000\n");
- EFPRINTF(fp, "[0004]\t\tPM Timer Block Address : %08X\n",
- IO_PMTMR);
- EFPRINTF(fp, "[0004]\t\tGPE0 Block Address : %08X\n", IO_GPE0_BLK);
- EFPRINTF(fp, "[0004]\t\tGPE1 Block Address : 00000000\n");
- EFPRINTF(fp, "[0001]\t\tPM1 Event Block Length : 04\n");
- EFPRINTF(fp, "[0001]\t\tPM1 Control Block Length : 02\n");
- EFPRINTF(fp, "[0001]\t\tPM2 Control Block Length : 00\n");
- EFPRINTF(fp, "[0001]\t\tPM Timer Block Length : 04\n");
- EFPRINTF(fp, "[0001]\t\tGPE0 Block Length : %02x\n", IO_GPE0_LEN);
- EFPRINTF(fp, "[0001]\t\tGPE1 Block Length : 00\n");
- EFPRINTF(fp, "[0001]\t\tGPE1 Base Offset : 00\n");
- EFPRINTF(fp, "[0001]\t\t_CST Support : 00\n");
- EFPRINTF(fp, "[0002]\t\tC2 Latency : 0000\n");
- EFPRINTF(fp, "[0002]\t\tC3 Latency : 0000\n");
- EFPRINTF(fp, "[0002]\t\tCPU Cache Size : 0000\n");
- EFPRINTF(fp, "[0002]\t\tCache Flush Stride : 0000\n");
- EFPRINTF(fp, "[0001]\t\tDuty Cycle Offset : 00\n");
- EFPRINTF(fp, "[0001]\t\tDuty Cycle Width : 00\n");
- EFPRINTF(fp, "[0001]\t\tRTC Day Alarm Index : 00\n");
- EFPRINTF(fp, "[0001]\t\tRTC Month Alarm Index : 00\n");
- EFPRINTF(fp, "[0001]\t\tRTC Century Index : 32\n");
- EFPRINTF(fp, "[0002]\t\tBoot Flags (decoded below) : 0000\n");
- EFPRINTF(fp, "\t\t\tLegacy Devices Supported (V2) : 0\n");
- EFPRINTF(fp, "\t\t\t8042 Present on ports 60/64 (V2) : 0\n");
- EFPRINTF(fp, "\t\t\tVGA Not Present (V4) : 1\n");
- EFPRINTF(fp, "\t\t\tMSI Not Supported (V4) : 0\n");
- EFPRINTF(fp, "\t\t\tPCIe ASPM Not Supported (V4) : 1\n");
- EFPRINTF(fp, "\t\t\tCMOS RTC Not Present (V5) : 0\n");
- EFPRINTF(fp, "[0001]\t\tReserved : 00\n");
- EFPRINTF(fp, "[0004]\t\tFlags (decoded below) : 00000000\n");
- EFPRINTF(fp, "\t\t\tWBINVD instruction is operational (V1) : 1\n");
- EFPRINTF(fp, "\t\t\tWBINVD flushes all caches (V1) : 0\n");
- EFPRINTF(fp, "\t\t\tAll CPUs support C1 (V1) : 1\n");
- EFPRINTF(fp, "\t\t\tC2 works on MP system (V1) : 0\n");
- EFPRINTF(fp, "\t\t\tControl Method Power Button (V1) : 0\n");
- EFPRINTF(fp, "\t\t\tControl Method Sleep Button (V1) : 1\n");
- EFPRINTF(fp, "\t\t\tRTC wake not in fixed reg space (V1) : 0\n");
- EFPRINTF(fp, "\t\t\tRTC can wake system from S4 (V1) : 0\n");
- EFPRINTF(fp, "\t\t\t32-bit PM Timer (V1) : 1\n");
- EFPRINTF(fp, "\t\t\tDocking Supported (V1) : 0\n");
- EFPRINTF(fp, "\t\t\tReset Register Supported (V2) : 1\n");
- EFPRINTF(fp, "\t\t\tSealed Case (V3) : 0\n");
- EFPRINTF(fp, "\t\t\tHeadless - No Video (V3) : 1\n");
- EFPRINTF(fp, "\t\t\tUse native instr after SLP_TYPx (V3) : 0\n");
- EFPRINTF(fp, "\t\t\tPCIEXP_WAK Bits Supported (V4) : 0\n");
- EFPRINTF(fp, "\t\t\tUse Platform Timer (V4) : 0\n");
- EFPRINTF(fp, "\t\t\tRTC_STS valid on S4 wake (V4) : 0\n");
- EFPRINTF(fp, "\t\t\tRemote Power-on capable (V4) : 0\n");
- EFPRINTF(fp, "\t\t\tUse APIC Cluster Model (V4) : 0\n");
- EFPRINTF(fp, "\t\t\tUse APIC Physical Destination Mode (V4) : 1\n");
- EFPRINTF(fp, "\t\t\tHardware Reduced (V5) : 0\n");
- EFPRINTF(fp, "\t\t\tLow Power S0 Idle (V5) : 0\n");
- EFPRINTF(fp, "\n");
-
- EFPRINTF(fp,
- "[0012]\t\tReset Register : [Generic Address Structure]\n");
- EFPRINTF(fp, "[0001]\t\tSpace ID : 01 [SystemIO]\n");
- EFPRINTF(fp, "[0001]\t\tBit Width : 08\n");
- EFPRINTF(fp, "[0001]\t\tBit Offset : 00\n");
- EFPRINTF(fp, "[0001]\t\tEncoded Access Width : 01 [Byte Access:8]\n");
- EFPRINTF(fp, "[0008]\t\tAddress : 0000000000000CF9\n");
- EFPRINTF(fp, "\n");
-
- EFPRINTF(fp, "[0001]\t\tValue to cause reset : 06\n");
- EFPRINTF(fp, "[0002]\t\tARM Flags (decoded below): 0000\n");
- EFPRINTF(fp, "\t\t\tPSCI Compliant : 0\n");
- EFPRINTF(fp, "\t\t\tMust use HVC for PSCI : 0\n");
- EFPRINTF(fp, "[0001]\t\tFADT Minor Revision : 01\n");
- EFPRINTF(fp, "[0008]\t\tFACS Address : 00000000%08X\n",
- basl_acpi_base + FACS_OFFSET);
- EFPRINTF(fp, "[0008]\t\tDSDT Address : 00000000%08X\n",
- basl_acpi_base + DSDT_OFFSET);
- EFPRINTF(fp,
- "[0012]\t\tPM1A Event Block : [Generic Address Structure]\n");
- EFPRINTF(fp, "[0001]\t\tSpace ID : 01 [SystemIO]\n");
- EFPRINTF(fp, "[0001]\t\tBit Width : 20\n");
- EFPRINTF(fp, "[0001]\t\tBit Offset : 00\n");
- EFPRINTF(fp, "[0001]\t\tEncoded Access Width : 02 [Word Access:16]\n");
- EFPRINTF(fp, "[0008]\t\tAddress : 00000000%08X\n",
- PM1A_EVT_ADDR);
- EFPRINTF(fp, "\n");
-
- EFPRINTF(fp,
- "[0012]\t\tPM1B Event Block : [Generic Address Structure]\n");
- EFPRINTF(fp, "[0001]\t\tSpace ID : 01 [SystemIO]\n");
- EFPRINTF(fp, "[0001]\t\tBit Width : 00\n");
- EFPRINTF(fp, "[0001]\t\tBit Offset : 00\n");
- EFPRINTF(fp,
- "[0001]\t\tEncoded Access Width : 00 [Undefined/Legacy]\n");
- EFPRINTF(fp, "[0008]\t\tAddress : 0000000000000000\n");
- EFPRINTF(fp, "\n");
-
- EFPRINTF(fp,
- "[0012]\t\tPM1A Control Block : [Generic Address Structure]\n");
- EFPRINTF(fp, "[0001]\t\tSpace ID : 01 [SystemIO]\n");
- EFPRINTF(fp, "[0001]\t\tBit Width : 10\n");
- EFPRINTF(fp, "[0001]\t\tBit Offset : 00\n");
- EFPRINTF(fp, "[0001]\t\tEncoded Access Width : 02 [Word Access:16]\n");
- EFPRINTF(fp, "[0008]\t\tAddress : 00000000%08X\n",
- PM1A_CNT_ADDR);
- EFPRINTF(fp, "\n");
-
- EFPRINTF(fp,
- "[0012]\t\tPM1B Control Block : [Generic Address Structure]\n");
- EFPRINTF(fp, "[0001]\t\tSpace ID : 01 [SystemIO]\n");
- EFPRINTF(fp, "[0001]\t\tBit Width : 00\n");
- EFPRINTF(fp, "[0001]\t\tBit Offset : 00\n");
- EFPRINTF(fp,
- "[0001]\t\tEncoded Access Width : 00 [Undefined/Legacy]\n");
- EFPRINTF(fp, "[0008]\t\tAddress : 0000000000000000\n");
- EFPRINTF(fp, "\n");
-
- EFPRINTF(fp,
- "[0012]\t\tPM2 Control Block : [Generic Address Structure]\n");
- EFPRINTF(fp, "[0001]\t\tSpace ID : 01 [SystemIO]\n");
- EFPRINTF(fp, "[0001]\t\tBit Width : 08\n");
- EFPRINTF(fp, "[0001]\t\tBit Offset : 00\n");
- EFPRINTF(fp,
- "[0001]\t\tEncoded Access Width : 00 [Undefined/Legacy]\n");
- EFPRINTF(fp, "[0008]\t\tAddress : 0000000000000000\n");
- EFPRINTF(fp, "\n");
-
- /* Valid for bhyve */
- EFPRINTF(fp,
- "[0012]\t\tPM Timer Block : [Generic Address Structure]\n");
- EFPRINTF(fp, "[0001]\t\tSpace ID : 01 [SystemIO]\n");
- EFPRINTF(fp, "[0001]\t\tBit Width : 20\n");
- EFPRINTF(fp, "[0001]\t\tBit Offset : 00\n");
- EFPRINTF(fp,
- "[0001]\t\tEncoded Access Width : 03 [DWord Access:32]\n");
- EFPRINTF(fp, "[0008]\t\tAddress : 00000000%08X\n",
- IO_PMTMR);
- EFPRINTF(fp, "\n");
-
- EFPRINTF(fp, "[0012]\t\tGPE0 Block : [Generic Address Structure]\n");
- EFPRINTF(fp, "[0001]\t\tSpace ID : 01 [SystemIO]\n");
- EFPRINTF(fp, "[0001]\t\tBit Width : %02x\n", IO_GPE0_LEN * 8);
- EFPRINTF(fp, "[0001]\t\tBit Offset : 00\n");
- EFPRINTF(fp, "[0001]\t\tEncoded Access Width : 01 [Byte Access:8]\n");
- EFPRINTF(fp, "[0008]\t\tAddress : %016X\n", IO_GPE0_BLK);
- EFPRINTF(fp, "\n");
-
- EFPRINTF(fp, "[0012]\t\tGPE1 Block : [Generic Address Structure]\n");
- EFPRINTF(fp, "[0001]\t\tSpace ID : 01 [SystemIO]\n");
- EFPRINTF(fp, "[0001]\t\tBit Width : 00\n");
- EFPRINTF(fp, "[0001]\t\tBit Offset : 00\n");
- EFPRINTF(fp,
- "[0001]\t\tEncoded Access Width : 00 [Undefined/Legacy]\n");
- EFPRINTF(fp, "[0008]\t\tAddress : 0000000000000000\n");
- EFPRINTF(fp, "\n");
-
- EFPRINTF(fp,
- "[0012]\t\tSleep Control Register : [Generic Address Structure]\n");
- EFPRINTF(fp, "[0001]\t\tSpace ID : 01 [SystemIO]\n");
- EFPRINTF(fp, "[0001]\t\tBit Width : 08\n");
- EFPRINTF(fp, "[0001]\t\tBit Offset : 00\n");
- EFPRINTF(fp, "[0001]\t\tEncoded Access Width : 01 [Byte Access:8]\n");
- EFPRINTF(fp, "[0008]\t\tAddress : 0000000000000000\n");
- EFPRINTF(fp, "\n");
-
- EFPRINTF(fp,
- "[0012]\t\tSleep Status Register : [Generic Address Structure]\n");
- EFPRINTF(fp, "[0001]\t\tSpace ID : 01 [SystemIO]\n");
- EFPRINTF(fp, "[0001]\t\tBit Width : 08\n");
- EFPRINTF(fp, "[0001]\t\tBit Offset : 00\n");
- EFPRINTF(fp, "[0001]\t\tEncoded Access Width : 01 [Byte Access:8]\n");
- EFPRINTF(fp, "[0008]\t\tAddress : 0000000000000000\n");
-
- EFFLUSH(fp);
-
- return (0);
-
-err_exit:
- return (errno);
-}
-
/*
* Helper routines for writing to the DSDT from other modules.
*/
@@ -809,6 +592,152 @@
return (0);
}
+static int
+build_fadt(struct vmctx *const ctx)
+{
+ struct basl_table *fadt;
+
+ BASL_EXEC(basl_table_create(&fadt, ctx, ACPI_SIG_FADT,
+ BASL_TABLE_ALIGNMENT, FADT_OFFSET));
+
+ /* Header */
+ BASL_EXEC(
+ basl_table_append_header(fadt, ACPI_SIG_FADT, BASL_REVISION_FADT,
+ BASL_OEM_ID, BASL_OEM_TABLE_ID_FADT, BASL_OEM_REVISION_FADT));
+ /* FACS Address */
+ BASL_EXEC(basl_table_append_pointer(fadt, ACPI_SIG_FACS,
+ ACPI_RSDT_ENTRY_SIZE));
+ /* DSDT Address */
+ BASL_EXEC(basl_table_append_pointer(fadt, ACPI_SIG_DSDT,
+ ACPI_RSDT_ENTRY_SIZE));
+ /* Reserved */
+ BASL_EXEC(basl_table_append_int(fadt, 0, 1));
+ /* Preferred_PM_Profile [Unspecified] */
+ BASL_EXEC(basl_table_append_int(fadt, 0, 1));
+ /* SCI Interrupt */
+ BASL_EXEC(basl_table_append_int(fadt, SCI_INT, 2));
+ /* SMI Command Port */
+ BASL_EXEC(basl_table_append_int(fadt, SMI_CMD, 4));
+ /* ACPI Enable Value */
+ BASL_EXEC(basl_table_append_int(fadt, BHYVE_ACPI_ENABLE, 1));
+ /* ACPI Disable Value */
+ BASL_EXEC(basl_table_append_int(fadt, BHYVE_ACPI_DISABLE, 1));
+ /* S4BIOS Command */
+ BASL_EXEC(basl_table_append_int(fadt, 0, 1));
+ /* P-State Control */
+ BASL_EXEC(basl_table_append_int(fadt, 0, 1));
+ /* PM1A Event Block Address */
+ BASL_EXEC(basl_table_append_int(fadt, PM1A_EVT_ADDR, 4));
+ /* PM1B Event Block Address */
+ BASL_EXEC(basl_table_append_int(fadt, 0, 4));
+ /* PM1A Control Block Address */
+ BASL_EXEC(basl_table_append_int(fadt, PM1A_CNT_ADDR, 4));
+ /* PM1B Control Block Address */
+ BASL_EXEC(basl_table_append_int(fadt, 0, 4));
+ /* PM2 Control Block Address */
+ BASL_EXEC(basl_table_append_int(fadt, 0, 4));
+ /* PM Timer Block Address */
+ BASL_EXEC(basl_table_append_int(fadt, IO_PMTMR, 4));
+ /* GPE0 Block Address */
+ BASL_EXEC(basl_table_append_int(fadt, IO_GPE0_BLK, 4));
+ /* GPE1 Block Address */
+ BASL_EXEC(basl_table_append_int(fadt, 0, 4));
+ /* PM1 Event Block Length */
+ BASL_EXEC(basl_table_append_int(fadt, 4, 1));
+ /* PM1 Control Block Length */
+ BASL_EXEC(basl_table_append_int(fadt, 2, 1));
+ /* PM2 Control Block Length */
+ BASL_EXEC(basl_table_append_int(fadt, 0, 1));
+ /* PM Timer Block Length */
+ BASL_EXEC(basl_table_append_int(fadt, 4, 1));
+ /* GPE0 Block Length */
+ BASL_EXEC(basl_table_append_int(fadt, IO_GPE0_LEN, 1));
+ /* GPE1 Block Length */
+ BASL_EXEC(basl_table_append_int(fadt, 0, 1));
+ /* GPE1 Base Offset */
+ BASL_EXEC(basl_table_append_int(fadt, 0, 1));
+ /* _CST Support */
+ BASL_EXEC(basl_table_append_int(fadt, 0, 1));
+ /* C2 Latency */
+ BASL_EXEC(basl_table_append_int(fadt, 0, 2));
+ /* C3 Latency */
+ BASL_EXEC(basl_table_append_int(fadt, 0, 2));
+ /* CPU Cache Size */
+ BASL_EXEC(basl_table_append_int(fadt, 0, 2));
+ /* Cache Flush Stride */
+ BASL_EXEC(basl_table_append_int(fadt, 0, 2));
+ /* Duty Cycle Offset */
+ BASL_EXEC(basl_table_append_int(fadt, 0, 1));
+ /* Duty Cycle Width */
+ BASL_EXEC(basl_table_append_int(fadt, 0, 1));
+ /* RTC Day Alarm Index */
+ BASL_EXEC(basl_table_append_int(fadt, 0, 1));
+ /* RTC Month Alarm Index */
+ BASL_EXEC(basl_table_append_int(fadt, 0, 1));
+ /* RTC Century Index */
+ BASL_EXEC(basl_table_append_int(fadt, 0x32, 1));
+ /* Boot Flags */
+ BASL_EXEC(basl_table_append_int(fadt,
+ ACPI_FADT_NO_VGA | ACPI_FADT_NO_ASPM, 2));
+ /* Reserved */
+ BASL_EXEC(basl_table_append_int(fadt, 0, 1));
+ /* Flags */
+ BASL_EXEC(basl_table_append_int(fadt,
+ ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED | ACPI_FADT_SLEEP_BUTTON |
+ ACPI_FADT_32BIT_TIMER | ACPI_FADT_RESET_REGISTER |
+ ACPI_FADT_HEADLESS | ACPI_FADT_APIC_PHYSICAL,
+ 4));
+ /* Reset Register */
+ BASL_EXEC(basl_table_append_gas(fadt, ACPI_ADR_SPACE_SYSTEM_IO, 8, 0,
+ ACPI_GAS_ACCESS_WIDTH_BYTE, 0xCF9));
+ /* Reset Value */
+ BASL_EXEC(basl_table_append_int(fadt, 6, 1));
+ /* ARM Boot Architecture Flags */
+ BASL_EXEC(basl_table_append_int(fadt, 0, 2));
+ /* FADT Minor Version */
+ BASL_EXEC(basl_table_append_int(fadt, 1, 1));
+ /* Extended FACS Address */
+ BASL_EXEC(basl_table_append_pointer(fadt, ACPI_SIG_FACS,
+ ACPI_XSDT_ENTRY_SIZE));
+ /* Extended DSDT Address */
+ BASL_EXEC(basl_table_append_pointer(fadt, ACPI_SIG_DSDT,
+ ACPI_XSDT_ENTRY_SIZE));
+ /* Extended PM1A Event Block Address */
+ BASL_EXEC(basl_table_append_gas(fadt, ACPI_ADR_SPACE_SYSTEM_IO, 0x20, 0,
+ ACPI_GAS_ACCESS_WIDTH_WORD, PM1A_EVT_ADDR));
+ /* Extended PM1B Event Block Address */
+ BASL_EXEC(basl_table_append_gas(fadt, ACPI_ADR_SPACE_SYSTEM_IO, 0, 0,
+ ACPI_GAS_ACCESS_WIDTH_UNDEFINED, 0));
+ /* Extended PM1A Control Block Address */
+ BASL_EXEC(basl_table_append_gas(fadt, ACPI_ADR_SPACE_SYSTEM_IO, 0x10, 0,
+ ACPI_GAS_ACCESS_WIDTH_WORD, PM1A_CNT_ADDR));
+ /* Extended PM1B Control Block Address */
+ BASL_EXEC(basl_table_append_gas(fadt, ACPI_ADR_SPACE_SYSTEM_IO, 0, 0,
+ ACPI_GAS_ACCESS_WIDTH_UNDEFINED, 0));
+ /* Extended PM2 Control Block Address */
+ BASL_EXEC(basl_table_append_gas(fadt, ACPI_ADR_SPACE_SYSTEM_IO, 8, 0,
+ ACPI_GAS_ACCESS_WIDTH_UNDEFINED, 0));
+ /* Extended PM Timer Block Address */
+ BASL_EXEC(basl_table_append_gas(fadt, ACPI_ADR_SPACE_SYSTEM_IO, 0x20, 0,
+ ACPI_GAS_ACCESS_WIDTH_DWORD, IO_PMTMR));
+ /* Extended GPE0 Block Address */
+ BASL_EXEC(basl_table_append_gas(fadt, ACPI_ADR_SPACE_SYSTEM_IO,
+ IO_GPE0_LEN * 8, 0, ACPI_GAS_ACCESS_WIDTH_BYTE, IO_GPE0_BLK));
+ /* Extended GPE1 Block Address */
+ BASL_EXEC(basl_table_append_gas(fadt, ACPI_ADR_SPACE_SYSTEM_IO, 0, 0,
+ ACPI_GAS_ACCESS_WIDTH_UNDEFINED, 0));
+ /* Sleep Control Register Address */
+ BASL_EXEC(basl_table_append_gas(fadt, ACPI_ADR_SPACE_SYSTEM_IO, 8, 0,
+ ACPI_GAS_ACCESS_WIDTH_BYTE, 0));
+ /* Sleep Status Register Address */
+ BASL_EXEC(basl_table_append_gas(fadt, ACPI_ADR_SPACE_SYSTEM_IO, 8, 0,
+ ACPI_GAS_ACCESS_WIDTH_BYTE, 0));
+ /* Hypervisor Vendor Identity */
+ BASL_EXEC(basl_table_append_int(fadt, 0, 8));
+
+ return (0);
+}
+
static int
build_hpet(struct vmctx *const ctx)
{
@@ -990,11 +919,15 @@
/*
* Run through all the ASL files, compiling them and
* copying them into guest memory
+ *
+ * According to UEFI Specification v6.3 chapter 5.1 the FADT should be
+ * the first table pointed to by XSDT. For that reason, build it as
+ * first table after XSDT.
*/
BASL_EXEC(basl_compile(ctx, basl_fwrite_rsdp, 0));
BASL_EXEC(basl_compile(ctx, basl_fwrite_rsdt, RSDT_OFFSET));
BASL_EXEC(basl_compile(ctx, basl_fwrite_xsdt, XSDT_OFFSET));
- BASL_EXEC(basl_compile(ctx, basl_fwrite_fadt, FADT_OFFSET));
+ BASL_EXEC(build_fadt(ctx));
BASL_EXEC(build_madt(ctx));
BASL_EXEC(build_hpet(ctx));
BASL_EXEC(build_mcfg(ctx));
diff --git a/usr.sbin/bhyve/basl.h b/usr.sbin/bhyve/basl.h
--- a/usr.sbin/bhyve/basl.h
+++ b/usr.sbin/bhyve/basl.h
@@ -19,6 +19,7 @@
#define BHYVE_ACPI_BASE 0xf2400
#define BASL_REVISION_DSDT 2
+#define BASL_REVISION_FADT 5
#define BASL_REVISION_HPET 1
#define BASL_REVISION_MADT 1
#define BASL_REVISION_MCFG 1
@@ -26,11 +27,13 @@
#define BASL_OEM_ID "BHYVE "
#define BASL_OEM_TABLE_ID_DSDT "BVDSDT "
+#define BASL_OEM_TABLE_ID_FADT "BVFACP "
#define BASL_OEM_TABLE_ID_HPET "BVHPET "
#define BASL_OEM_TABLE_ID_MADT "BVMADT "
#define BASL_OEM_TABLE_ID_MCFG "BVMCFG "
#define BASL_OEM_REVISION_DSDT 1
+#define BASL_OEM_REVISION_FADT 1
#define BASL_OEM_REVISION_HPET 1
#define BASL_OEM_REVISION_MADT 1
#define BASL_OEM_REVISION_MCFG 1

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