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diff --git a/sys/amd64/amd64/mp_machdep.c b/sys/amd64/amd64/mp_machdep.c
--- a/sys/amd64/amd64/mp_machdep.c
+++ b/sys/amd64/amd64/mp_machdep.c
@@ -102,13 +102,16 @@
extern u_int mptramp_la57;
extern u_int mptramp_nx;
-
+smp_targeted_tlb_shootdown_t smp_targeted_tlb_shootdown = &smp_targeted_tlb_shootdown_native;
/*
* Local data and functions.
*/
static int start_ap(int apic_id, vm_paddr_t boot_address);
+void
+smp_targeted_tlb_shootdown_native(pmap_t pmap, vm_offset_t addr1, vm_offset_t addr2,
+ smp_invl_cb_t curcpu_cb, enum invl_op_codes op);
/*
* Initialize the IPI handlers and start up the AP's.
*/
@@ -497,24 +500,6 @@
* Flush the TLB on other CPU's
*/
-/*
- * Invalidation request. PCPU pc_smp_tlb_op uses u_int instead of the
- * enum to avoid both namespace and ABI issues (with enums).
- */
-enum invl_op_codes {
- INVL_OP_TLB = 1,
- INVL_OP_TLB_INVPCID = 2,
- INVL_OP_TLB_INVPCID_PTI = 3,
- INVL_OP_TLB_PCID = 4,
- INVL_OP_PGRNG = 5,
- INVL_OP_PGRNG_INVPCID = 6,
- INVL_OP_PGRNG_PCID = 7,
- INVL_OP_PG = 8,
- INVL_OP_PG_INVPCID = 9,
- INVL_OP_PG_PCID = 10,
- INVL_OP_CACHE = 11,
-};
-
/*
* These variables are initialized at startup to reflect how each of
* the different kinds of invalidations should be performed on the
@@ -600,8 +585,8 @@
* Function must be called with the thread pinned, and it unpins on
* completion.
*/
-static void
-smp_targeted_tlb_shootdown(pmap_t pmap, vm_offset_t addr1, vm_offset_t addr2,
+void
+smp_targeted_tlb_shootdown_native(pmap_t pmap, vm_offset_t addr1, vm_offset_t addr2,
smp_invl_cb_t curcpu_cb, enum invl_op_codes op)
{
cpuset_t mask;
diff --git a/sys/vm/pmap.h b/sys/vm/pmap.h
--- a/sys/vm/pmap.h
+++ b/sys/vm/pmap.h
@@ -167,6 +167,33 @@
void pmap_zero_page(vm_page_t);
void pmap_zero_page_area(vm_page_t, int off, int size);
+/*
+ * Invalidation request. PCPU pc_smp_tlb_op uses u_int instead of the
+ * enum to avoid both namespace and ABI issues (with enums).
+ */
+enum invl_op_codes {
+ INVL_OP_TLB = 1,
+ INVL_OP_TLB_INVPCID = 2,
+ INVL_OP_TLB_INVPCID_PTI = 3,
+ INVL_OP_TLB_PCID = 4,
+ INVL_OP_PGRNG = 5,
+ INVL_OP_PGRNG_INVPCID = 6,
+ INVL_OP_PGRNG_PCID = 7,
+ INVL_OP_PG = 8,
+ INVL_OP_PG_INVPCID = 9,
+ INVL_OP_PG_PCID = 10,
+ INVL_OP_CACHE = 11,
+};
+typedef void (*smp_invl_local_cb_t)(struct pmap *, vm_offset_t addr1,
+ vm_offset_t addr2);
+typedef void (*smp_targeted_tlb_shootdown_t)(pmap_t, vm_offset_t, vm_offset_t,
+ smp_invl_local_cb_t, enum invl_op_codes);
+
+extern void
+smp_targeted_tlb_shootdown_native(pmap_t, vm_offset_t, vm_offset_t,
+ smp_invl_local_cb_t, enum invl_op_codes);
+extern smp_targeted_tlb_shootdown_t smp_targeted_tlb_shootdown;
+
#define pmap_resident_count(pm) ((pm)->pm_stats.resident_count)
#define pmap_wired_count(pm) ((pm)->pm_stats.wired_count)

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