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D41170.id125208.diff
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D41170.id125208.diff
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diff --git a/sys/dev/e1000/em_txrx.c b/sys/dev/e1000/em_txrx.c
--- a/sys/dev/e1000/em_txrx.c
+++ b/sys/dev/e1000/em_txrx.c
@@ -141,7 +141,6 @@
if_softc_ctx_t scctx = sc->shared;
struct em_tx_queue *que = &sc->tx_queues[pi->ipi_qsidx];
struct tx_ring *txr = &que->txr;
- struct e1000_hw *hw = &sc->hw;
struct e1000_context_desc *TXD;
int cur, hdr_len;
uint32_t cmd_type_len;
@@ -151,27 +150,39 @@
E1000_TXD_DTYP_D | /* Data descr type */
E1000_TXD_CMD_TSE); /* Do TSE on this packet */
- /* IP and/or TCP header checksum calculation and insertion. */
- *txd_upper = (E1000_TXD_POPTS_IXSM | E1000_TXD_POPTS_TXSM) << 8;
-
cur = pi->ipi_pidx;
TXD = (struct e1000_context_desc *)&txr->tx_base[cur];
/*
- * Start offset for header checksum calculation.
- * End offset for header checksum calculation.
- * Offset of place put the checksum.
+ * ipcss - Start offset for header checksum calculation.
+ * ipcse - End offset for header checksum calculation.
+ * ipcso - Offset of place to put the checksum.
*/
+ switch(pi->ipi_etype) {
+ case ETHERTYPE_IP:
+ /* IP and/or TCP header checksum calculation and insertion. */
+ *txd_upper = (E1000_TXD_POPTS_IXSM | E1000_TXD_POPTS_TXSM) << 8;
+
+ TXD->lower_setup.ip_fields.ipcse =
+ htole16(pi->ipi_ehdrlen + pi->ipi_ip_hlen - 1);
+ break;
+ case ETHERTYPE_IPV6:
+ /* TCP header checksum calculation and insertion. */
+ *txd_upper = E1000_TXD_POPTS_TXSM << 8;
+
+ TXD->lower_setup.ip_fields.ipcse = htole16(0);
+ default:
+ break;
+ }
TXD->lower_setup.ip_fields.ipcss = pi->ipi_ehdrlen;
- TXD->lower_setup.ip_fields.ipcse =
- htole16(pi->ipi_ehdrlen + pi->ipi_ip_hlen - 1);
TXD->lower_setup.ip_fields.ipcso =
pi->ipi_ehdrlen + offsetof(struct ip, ip_sum);
+
/*
- * Start offset for payload checksum calculation.
- * End offset for payload checksum calculation.
- * Offset of place to put the checksum.
+ * tucss - Start offset for payload checksum calculation.
+ * tucse - End offset for payload checksum calculation.
+ * tucso - Offset of place to put the checksum.
*/
TXD->upper_setup.tcp_fields.tucss = pi->ipi_ehdrlen + pi->ipi_ip_hlen;
TXD->upper_setup.tcp_fields.tucse = 0;
@@ -195,9 +206,7 @@
E1000_TXD_CMD_DEXT | /* Extended descr */
E1000_TXD_CMD_TSE | /* TSE context */
E1000_TXD_CMD_TCP; /* Do TCP checksum */
- if (hw->mac.type == e1000_82544)
- cmd_type_len |= E1000_TXD_CMD_IP;
- else if (pi->ipi_etype == ETHERTYPE_IP)
+ if (pi->ipi_etype == ETHERTYPE_IP)
cmd_type_len |= E1000_TXD_CMD_IP;
TXD->cmd_and_length = htole32(cmd_type_len |
(pi->ipi_len - hdr_len)); /* Total len */
diff --git a/sys/dev/e1000/if_em.c b/sys/dev/e1000/if_em.c
--- a/sys/dev/e1000/if_em.c
+++ b/sys/dev/e1000/if_em.c
@@ -784,8 +784,7 @@
#define LEM_CAPS \
IFCAP_HWCSUM | IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING | \
IFCAP_VLAN_HWCSUM | IFCAP_WOL | IFCAP_VLAN_HWFILTER | IFCAP_TSO4 | \
- IFCAP_LRO | IFCAP_VLAN_HWTSO| IFCAP_JUMBO_MTU | IFCAP_HWCSUM_IPV6 | \
- IFCAP_TSO6
+ IFCAP_LRO | IFCAP_VLAN_HWTSO| IFCAP_JUMBO_MTU | IFCAP_HWCSUM_IPV6
#define EM_CAPS \
IFCAP_HWCSUM | IFCAP_VLAN_MTU | IFCAP_VLAN_HWTAGGING | \
@@ -937,14 +936,14 @@
scctx->isc_tx_tso_segments_max = EM_MAX_SCATTER;
scctx->isc_tx_tso_size_max = EM_TSO_SIZE;
scctx->isc_tx_tso_segsize_max = EM_TSO_SEG_SIZE;
- scctx->isc_capabilities = scctx->isc_capenable = EM_CAPS;
+ scctx->isc_capabilities = scctx->isc_capenable = LEM_CAPS;
/*
- * For LEM-class devices, don't enable IFCAP_{TSO4,VLAN_HWTSO,TSO6}
+ * For LEM-class devices, don't enable IFCAP_{TSO4,VLAN_HWTSO}
* by default as we don't have workarounds for all associated
* silicon errata. TSO4 may work on > 82544 but its status
* is unknown by the authors. Please report any success or failures.
*/
- scctx->isc_capenable &= ~(IFCAP_TSO4 | IFCAP_VLAN_HWTSO | IFCAP_TSO6);
+ scctx->isc_capenable &= ~(IFCAP_TSO4 | IFCAP_VLAN_HWTSO);
scctx->isc_tx_csum_flags = CSUM_TCP | CSUM_UDP | CSUM_IP_TSO |
CSUM_IP6_TCP | CSUM_IP6_UDP;
@@ -1352,7 +1351,6 @@
E1000_RAR_ENTRIES - 1);
}
-
/* Initialize the hardware */
em_reset(ctx);
em_if_update_admin_status(ctx);
@@ -1407,6 +1405,10 @@
} else if (sc->intr_type == IFLIB_INTR_MSIX) /* Set up queue routing */
igb_configure_queues(sc);
+ /* Only do TSO on gigabit Ethernet for older parts due to errata */
+ if (sc->hw.mac.type < igb_mac_min && sc->link_speed != 1000)
+ scctx->isc_capenable &= ~(IFCAP_TSO4 | IFCAP_VLAN_HWTSO | IFCAP_TSO6);
+
/* this clears any pending interrupts */
E1000_READ_REG(&sc->hw, E1000_ICR);
E1000_WRITE_REG(&sc->hw, E1000_ICS, E1000_ICS_LSC);
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D41170.id125208.diff (4 KB)
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D41170: e1000: fixes for lem(4) and em(4) TSO
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