uart: Honour clock-frequency in FDT for UART_FDT_CLASS if present

[jrtc27]

Summary

The StarFive VisionFive 2 has a Synopsys DesignWare ABP UART, whose
driver uses UART_FDT_CLASS rather than UART_FDT_CLASS_AND_DEVICE as it
has its own separate newbus driver. This UART is driven by a 24MHz clock
as specified in the FDT, but we don't currently look at the property
here, instead passing down 0 and letting the default value be used in
the 8250 driver (~1.8MHz). As a result the divisor is misconfigured for
the current baud rate for the entire kernel boot process. Once the
newbus driver attaches the correct frequency is saved in the softc, but
that does not take effect until the next time ns8250_param is called and
the divisor is recalculated, namely when userspace runs and /dev/console
is opened (note that ns8250_init does not get called when the newbus
device corresponding to the current console attaches).

Fix this issue by attemmpting to get the current clock frequency as for
the UART_FDT_CLASS_AND_DEVICE_CASE, but falling back to 0 rather than
failing on error.

[jrtc27]

It's hard to tell if this was a deliberate design choice or just not thought to be needed when the current UART_FDT_CLASS(_AND_DEVICE) framework was added, but I don't see a good alternative to this. Note that snps and tegra_uart are the only in-tree UART_FDT_CLASS users, and both wrap ns8250.

[mhorne]

Thank you for finding the proper fix! Working fine on my end.